发明名称 Metal pads for electrical probe testing on wafer with bump interconnects
摘要 An improved integrated circuit device that includes both bond pads and trim pads is disclosed. Electrically conductive, non-wettable and non-corrosive protective caps are formed over each of the trim pads. With this arrangement, the protective caps act as barriers between the trim pads and solder used to form solder bumps when the IC package is mounted onto a substrate. In one embodiment, the protective caps are formed from a material that is easily sputtered, such as titanium. In a method aspect of the invention, the protective caps are applied during wafer level processing before either the solder bumping or trimming operations.
申请公布号 US6327158(B1) 申请公布日期 2001.12.04
申请号 US19990231999 申请日期 1999.01.15
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 KELKAR NIKHIL VISHWANATH;KAO PAI-HSIANG
分类号 H01L23/485;H01L23/58;(IPC1-7):H05K7/06 主分类号 H01L23/485
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