| 摘要 |
A fast translation look-aside buffer for translating a linear address RL=A+B to a physical address, where A and B are two N bit operands. Inputs to the translation look-aside buffer are the n highest-order bits of A and B, where n<N, and the carry-out term from the sum of the first N-n bits of A and B. The TLB may provide a hit without the need for the sum of A and B.
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