发明名称 DRIVER CIRCUIT, RECEIVER CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce power consumption of a digital signal transmitting circuit. SOLUTION: A driver circuit 20 has a PFET 21, an NFET 23 and an NFET 22 of a low threshold voltage. An input signal DIN bar is applied to the gate of the PFET 21, and a reference potential Vref is applied to the gate of the NFET 22. The signal of a small amplitude limited by the Vref is outputted to a driver output DOUT. A receiver circuit 40 has a dynamic NAND circuit, composed of a PFET 41, NFET 42 and 43 of small threshold voltage and an inverter composed of a PFET 44 and a NOT gate 45. The signal of the small amplitude is level-shifted by the dynamic NAND circuit and driven by the inverters so that a signal ROUT of a CMOS level is outputted.
申请公布号 JP2001332968(A) 申请公布日期 2001.11.30
申请号 JP20000151499 申请日期 2000.05.23
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 ONISHI MASAJI
分类号 G11C11/401;G06F3/00;H03K19/0175;H04L25/02;(IPC1-7):H03K19/017 主分类号 G11C11/401
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