发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To reduce the number of fuses of a redundant circuit and to minimize pattern area. SOLUTION: This device is provided with plural memory cell mat 3 having a redundant memory cell area 5 and a redundant address line 7, and a redundant circuit 4 outputting a selecting signal selecting a desired memory cell mat 3, and the redundant circuit 4 is characterized in that the circuit is provided with a non-selection means (N channel type MOS transistor) in which a redundant address line of a non-selection memory cell mat is made non-selection forcedly in accordance with a memory cell mat selecting signal.
申请公布号 JP2001332095(A) 申请公布日期 2001.11.30
申请号 JP20000149426 申请日期 2000.05.22
申请人 SANYO ELECTRIC CO LTD 发明人 YAMAGUCHI MAMORU;SHIMADA YOSHIYUKI
分类号 G06F12/16;G11C11/401;G11C29/00;G11C29/04;(IPC1-7):G11C29/00 主分类号 G06F12/16
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