发明名称 DEVICE AND METHOD FOR COMPUTING TEMPORAL DETERIORATION MARGIN QUANTITY OF LSI AND DETECTION METHOD FOR LSI
摘要 PROBLEM TO BE SOLVED: To easily find a temporal deterioration margin quantity while taking temporal deterioration into consideration and to enable proper inspection taking the temporal deterioration into consideration. SOLUTION: A delay deterioration rate prediction part 101 outputs signal- path-delay-before-deterioration information 302 and signal-path-delay- deterioration-rate information 303 as to each signal path according to LSI design information and a delay-to-delay-deterioration-rate analysis part 102 outputs delay-to-delay-deterioration-rate relation information 304 showing the correlation between delay and delay deterioration rate according to them; and a delay deterioration rate extraction part 103 extracts the delay deterioration rate of a specific signal path and outputs it as a delay deterioration margin 305 and a delay deterioration margin quantity calculation part 104 calculates a delay deterioration margin quantity by using the delay deterioration margin 305 as a derating factor G. An inspection operating frequency calculation part 105 calculates an operating frequency for inspection by using the delay deterioration margin 305 as the derating factor G.
申请公布号 JP2001331545(A) 申请公布日期 2001.11.30
申请号 JP20010075675 申请日期 2001.03.16
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YONEZAWA HIROKAZU;KAWAKAMI YOSHIYUKI;IWANISHI NOBUFUSA
分类号 G01R31/30;G01R31/28;G06F17/50;H01L21/82;(IPC1-7):G06F17/50 主分类号 G01R31/30
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