| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory in which increment of a layout area of address signal lines owing to increment of the number of banks can be suppressed. SOLUTION: A refresh address counter RC generates a refresh address signal RA corresponding to each bank MB based on a refresh request signal RQ. A switching circuit SW switches a refresh address signal RA or an external address signal EA based on the refresh request signal RQ and outputs it, and a common address signal line GAL outputs the external address signal EA or the refresh address signal RA outputted from the switching circuit SW as a common address signal GA. An address latch circuit AL is provided for each bank MB, latches the common address signal GA corresponding to each bank MB out of common address signals GA, and outputs it to each bank MB. |
