| 摘要 |
A method of defining at least two different field effect transistor channel lengths includes forming a channel defining layer over a substrate, the semiconductor substrate having a mean global outer surface extending along a plane. First and second openings are etched into the channel defining layer. The first and second openings respectively have a pair of opposing sidewalls having substantially straight linear segments which are angled from the plane. The straight linear segments of the opposing sidewalls of the first opening are angled differently from the plane than the straight linear segments of the opposing sidewalls of the second opening and are thereby of different lengths. Integrated circuitry includes a first field effect transistor and a second field effect transistor. The first and second field effect transistors have respective channel lengths defined along their gate dielectric layers and respectively have at least some portion which is substantially straight linear. The first and second channel lengths have different total lengths, both of the straight linear portions of the first and second channel lengths are angled from the plane, and at least one of the straight linear portions of the first and second channel lengths are beveled relative to the plane.
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