| 摘要 |
The present invention provides a charge pump circuit capable of operating at a high speed with a low power source voltage and increasing the synchronization processing speed. The charge pump circuit comprises: a first switch circuit 15 connected between a first input node 12 through which a first signal CPin1 is input and a base of an NPN transistor Q4, for controlling the NPN transistor Q4 in response to the first signal CPin1; and a second switch circuit 16 connected between a second input node 13 and a base of an NPN transistor Q9, for controlling the NPN transistor Q9 in response to a second signal CPin2. The transistors Q4 and Q9, and transistors contained in the first and the second switch circuits 15 and 16 are all NPN transistors.
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