| 摘要 |
In- circuit emulation (ICE) and software debug facilities are included in a processor via a debug interface that interfaces a target processor to a host system. The debug interface, located on the target processor, includes a trace controller that monitors signals produced by the target processor to detect specified conditions and to produce a trace record of the specified conditions including a notification of the conditions and selected information relating to the conditions. The trace controller formats a trace information record and stores the trace information record in a trace buffer in a plurality of trace data storage elements. The trace data storage elements have a format that includes a trace code (TCODE) field indicative of a type of trace information and a trace data (TDATA) field indicative of a type of trace information data. |
