发明名称 Pseudo bipolar junction transistor
摘要 A pseudo bipolar junction transistor according to the invention includes two MOS transistors operating in saturation region, electrically connected in parallel with their drains and sources functioning as a collector and a emitter of the pseudo bipolar junction transistor, respectively, a first gate without any signal inputted and a second gate functioning as a base of the pseudo bipolar junction transistor, wherein the two gates is supplied with the same DC bias. The pseudo bipolar junction transistor is manufactured by CMOS process for applications in variable gain amplifiers, transfer linear function signal processors and logarithmic filters.
申请公布号 US6323719(B1) 申请公布日期 2001.11.27
申请号 US20000565751 申请日期 2000.05.08
申请人 NATIONAL SCIENCE COUNCIL 发明人 CHANG CHENG-CHIEH;LIU SHEN-IUAN
分类号 H03F3/343;H03F3/45;(IPC1-7):H03K17/60 主分类号 H03F3/343
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