Programmable logic device configured to accommodate multiplication

摘要

A programmable logic device is configured to accommodate multiplication by the provision in each logic region of specialized components to form and sum partial products. The specialized components are separate from the ordinary logic of the logic region, and their presence imposes little penalty on the performance of ordinary logic functions, while enhancing the speed at which multiplication is performed by minimizing the number of logic regions used for a particular multiplication operation, and also minimizing the use of the interconnection resources of the device to convey signals among those regions.