| 摘要 |
An integrated circuit is described which includes a metal level primarily comprising probe pads for testing the integrated circuit. This additional metal level is isolated from the integrated circuit upper metal level by an insulating layer. This probe metal level is selectively connected to the metal level and other regions of the integrated circuit to form electrical connections. The probe metal level allows for accurate and extensive pre-production testing of the integrated circuit without sacrificing valuable real-estate of the metal level. The probe metal level and the insulating layer are described as useful during pre-production phases and are preferably eliminated during production of the integrated circuit.
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