| 摘要 |
PROBLEM TO BE SOLVED: To suppress the rise/fall time of an output waveform and to widen margin for various dispersions by controlling the inputs of a drive circuit, which are connected to respective complementary signal output points, with the complementary signal of a full amplitude level without a timing difference. SOLUTION: An input signal IN and a reference voltage REF are inputted to a differential amplifier SA1 and a differential amplifier SA2. The circuit constants of circuits constituting the differential amplifiers SA1 and SA2 are generated equal to those of circuits constituting subsequent stages containing inverter circuits CINV1 and CINV2. At nodes N3 and N4, complementary signals without the timing difference can be obtained. The gates of NMOS transistors NT2 and NT5 are controlled like a feedback loop with the complementary signals. The complementary signals without the timing difference are obtained in output nodes OUT1 and OUT1B. |
