发明名称 SEMICONDUCTOR MULTIPLE LINE GRID, MANUFACTURING METHOD THEREOF AND METHOD FOR MOUNTING SEMICONDUCTOR CHIP ON PRINTED CIRCUIT BOARD USING THE SAME
摘要 A multiple line grid for redistributing I/O pads from a peripheral array to an area array is disclosed. The multiple line grid includes a body having a top and a bottom surfaces, via holes, connection lines, upper bumps arranged in an area array and lower bumps arranged in tow peripheral/side arrays. Each of the via holes is provided with a first end exposed on the top surface and a second opposite end exposed on the bottom surface of the body. Each of the connection lines has a different length from the neighbouring connection lines. Each of the upper bumps is arranged to be in contact with the first end of the corresponding via hole. Each of the lower bumps is connected to the second end of the corresponding via hole through the corresponding connection line. <IMAGE>
申请公布号 KR20010104147(A) 申请公布日期 2001.11.24
申请号 KR20000025605 申请日期 2000.05.13
申请人 GLOTECH INC. 发明人 KIM, YEONG SU;YOON, JONG GWANG
分类号 G01R31/26;G01R1/073;H01L21/66;H01L23/498;(IPC1-7):H01L25/00 主分类号 G01R31/26
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