发明名称 Schaltungsanordnung zur Abtastung von Aufzeichnungstraegern, auf denen Zeichen in Form von Bits in mehreren parallelen Spuren aufgezeichnet sind
摘要 902,164. Skew correction. INTERNATIONAL BUSINESS MACHINES CORPORATION. June 26, 1959 [June 30, 1958], No. 21956/59. Class 106 (1). Data characters are recorded in parallel by bit on tracks of a magnetic tape, each track having an associated read-in counter 16 which gates successive bits read from the track into successive positions of a skew buffer register 12: the counts in all the read-in counters 16 are compared with the count in a read-out counter 24 and when it is established that all the read-in counters store a greater count than the read-out counter a signal issues gating the contents of the position in the skew buffer registers corresponding to the count in the read-out counter to an output register. Thereafter, the read-out counter is advanced one count. The bits as they are read from the track control a variable frequency clock 10 (one to each track), pulses from which advance the read-in counter 12 and open a gate 11 (the trailing edge of each pulse advances the counter). The read-in in counter opens, according to its count, one of a set of gates 14 to the skew buffer 12. Both the read-in and read-out counters are duodecimal consisting of a set of four triggers T 1 to T 4 of which the outputs are combined with the outputs of triggers T A to To (not shown) to give the count of twelve. Comparison of the counts of the read-in and read-out counters takes place in circuits 18, as shown in Fig. 5. Coincidence of an off signal from a trigger of the read-in counter and an on signal from the corresponding trigger of the read-out counter means that the required condition exists. If the read-in counter has passed its twelve-count it issues an overflow signal which is sufficient to indicate a higher count than the read-out counter since this signal is stopped only when the latter has itself counted beyond twelve. The outputs of the compare circuits 18 are applied to an and circuit 22, the output of which initiates the transfer of data from the skew buffer registers. The variable frequency clock is preferably that described in Specification 902,163.
申请公布号 DE1125698(B) 申请公布日期 1962.03.15
申请号 DE1959I016652 申请日期 1959.06.27
申请人 IBM DEUTSCHLAND INTERNATIONALE BUERO-MASCHINEN GESELLSCHAFT M.B.H. 发明人 FLOROS THEODORE GEORGE
分类号 G11B20/10 主分类号 G11B20/10
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