| 摘要 |
A cipher apparatus comprising at least three shift registers (1), a control unit, (2) and a digital clock. For each time period of the clock at least two registers are shifted in accordance with a control signal received from the control unit. The control signal is generated by a function having input data comprising at least two distinct bits from each of the at least two registers. The outputs of the registers are combined using logic circuits (3,4) to generate a cipher stream that may be combined with a data stream (eg. by XOR function). The function controlling the shifting may be a majority function where a register is selected if the bit selected from it is the same as the majority of the selected bits. |
