发明名称 Methods and apparatus for a terminated fail-safe circuit
摘要 An active fail-safe method and apparatus for a LVDS receiver that uses a window comparator circuit to monitor the differential voltage at the receiver's input pins and drive the output to a known logic HIGH state in the absence of a valid input signal; i.e., when the input differential signal is less than a chosen threshold value of approximately 80 mV. Such a condition may occur when the cable is removed or damaged in such a way that no valid input signal is present. In the presence of a valid input signal, the circuit's output tracks the differential input without any degradation to the signal.
申请公布号 US6320406(B1) 申请公布日期 2001.11.20
申请号 US20000677340 申请日期 2000.10.02
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 MORGAN MARK W.;CARVAJAL FERNANDO D.;GINGERICH KEVIN J.
分类号 H03K5/1252;H03K19/007;H04L25/08;(IPC1-7):H03K9/007 主分类号 H03K5/1252
代理机构 代理人
主权项
地址