发明名称 |
METHOD FOR DESIGNING INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To optimize performance of an integrated circuit more than in the prior art as a method for designing the integrated circuit. SOLUTION: After an initial layout (S20), an integrated circuit evaluation circuit step S30, a change cell selection step S40 and a cell performance change step S50 are repeatedly executed. In the change cell selection step S40, a cell changing performance is selected from among the cells constituting an integrated circuit based on evaluation results in step S30. In the cell performance change step S50, the performance characteristics of the cell selected in step S40 are determined referring to a library 15 by use of its external conditions.
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申请公布号 |
JP2001319977(A) |
申请公布日期 |
2001.11.16 |
申请号 |
JP20010041656 |
申请日期 |
2001.02.19 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
TANAKA MASAKAZU;FUKUI MASAHIRO;TSUKIYAMA SHUJI |
分类号 |
G06F17/50;H01L21/82;(IPC1-7):H01L21/82 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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