发明名称 DATA PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a data processor capable of suppressing the generation of a gate disturbance phenomenon and improving reliability in a data processing using a built-in flash memory. SOLUTION: By holding the loop processing part of a program stored in a flash memory 2 in the storage area of an SRAM 4 corresponding to a range specified by an SRAM size storage means 8 from an address specified by an SRAM start address storage means 7, since read is performed only from the SRAM 4 from the second time of the loop processing, the flash memory 2 is not accessed in the case that the program is looped, the opportunities of normal read to the flash memory 2 are reduced, the gate disturbance phenomenon hardly occurs and the flash memory 2 holds stable data for a long period of time.
申请公布号 JP2001318790(A) 申请公布日期 2001.11.16
申请号 JP20000139257 申请日期 2000.05.12
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMADA KAZUMI
分类号 G06F12/08;G06F9/32;G06F9/38;G06F12/00;G06F12/06;(IPC1-7):G06F9/32 主分类号 G06F12/08
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