发明名称 TRENCH ISOLATOIN REGIONS HAVING TRENCH LINERS WITH RECESSED ENDS
摘要 A trench isolation structure which prevents a hump phenomenon and an inverse narrow width effect of transistors by rounding the top edges of a trench and increasing the amount of oxidation at the top edges of a trench, a semiconductor device having the trench isolation structure, and a trench isolation method are provided. In this trench isolation method, a trench is formed in non-active regions of a semiconductor substrate. An inner wall oxide film having a thickness of 10 to 150Å is formed on the inner wall of the trench. A liner is formed on the surface of the inner wall oxide film. The trench is filled with a dielectric film. Part of the liner is etched so that the top ends of the silicon nitride liner are recessed from the surface of the semiconductor substrate.
申请公布号 US2001041421(A1) 申请公布日期 2001.11.15
申请号 US20010911096 申请日期 2001.07.23
申请人 PARK TAI-SU;PARK MOON-HAN;PARK KYUNG-WON;LEE HAN-SIN 发明人 PARK TAI-SU;PARK MOON-HAN;PARK KYUNG-WON;LEE HAN-SIN
分类号 H01L21/76;H01L21/316;H01L21/762;H01L29/78;(IPC1-7):H01L21/76 主分类号 H01L21/76
代理机构 代理人
主权项
地址