| 发明名称 |
Integrated circuit wiring and fabricating method thereof |
| 摘要 |
The present invention relates to an integrated circuit wiring capable of reducing the contact resistance between lines and a fabricating method thereof. The wiring in accordance with the present invention includes a gate oxide film formed on the upper surface of a semiconductor device. A first line including a first silicon film pattern that is formed on an upper surface of the gate oxide film and has a certain width; and a silicide film pattern that is formed on the upper surface of the first silicon film and has a smaller width than that of the first silicon film pattern to thereby expose a certain region of the first silicon film pattern. A second line is formed to contact the silicide film pattern and the exposed certain region of the silicon film pattern.
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| 申请公布号 |
US2001040261(A1) |
申请公布日期 |
2001.11.15 |
| 申请号 |
US20000730811 |
申请日期 |
2000.12.07 |
| 申请人 |
HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. |
发明人 |
KIM PIL-SUNG |
| 分类号 |
H01L21/77;H01L21/28;H01L21/3205;H01L21/336;H01L21/768;H01L21/8234;H01L21/8242;H01L23/52;H01L23/522;H01L27/088;H01L27/108;H01L29/423;H01L29/43;H01L29/49;(IPC1-7):H01L29/76;H01L21/320;H01L29/94;H01L21/476 |
主分类号 |
H01L21/77 |
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