发明名称 INSTRUCTION MEMORY CIRCUIT
摘要 An instruction memory circuit comprises an external instruction memory for storing a plurality of instruction codes, and an internal instruction memory having capability of outputting and rewriting instruction codes stored therein at high speed for storing instruction codes which have preliminarily been read out from the external instruction memory and outputting the instruction codes for instruction execution. The internal instruction memory is composed of 1st through Nth memory blocks which can be accessed independently. The instruction memory circuit also comprises a memory block reading measure and a memory block writing measure. The memory block reading measure activates one of the 1st through Nth memory blocks for instruction code reading, and executes instruction code reading from the activated memory block. The memory block writing measure activates another one of the 1st through Nth memory blocks for instruction code writing during execution of the instruction code reading by the memory block reading measure, and executes instruction code writing into the activated memory block. By such operation, "instruction code reading (execution) from a memory block" and "instruction code writing into another memory block" can be executed simultaneously, and thus high speed and efficient instruction execution can be realized.
申请公布号 US2001042155(A1) 申请公布日期 2001.11.15
申请号 US19990235308 申请日期 1999.01.22
申请人 NEC CORPORATION 发明人 NAMEKI HIROSHI
分类号 G06F12/06;G06F9/38;G06F12/08;(IPC1-7):G06F15/00;G06F12/00;G06F13/00 主分类号 G06F12/06
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