| 摘要 |
To provide a data processing apparatus that allows the occurrence of a gate disturb effect to be reduced and the reliability of data processing using the internal flash memory to be improved. A loop process section of a program stored in flash memory is held in a storage area in SRAM that corresponds to a range from an address specified by the SRAM start address storage to a value specified by a SRAM size storage, thereby the section is read only from the SRAM when the loop process is performed the subsequent times. Thus, if the program is looped, the flash memory is not accessed and therefore the frequency of normal reads from the flash memory decreases to minimize the occurrence of the gate disturb effect, allowing the flash memory to hold data that is stable for an extended period of time.
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