HIGH-RESISTANCE LOAD SRAM

摘要

A SRAM includes a plurality of high-resistance memory cells each having a point symmetric structure. The memory cell has a pair of load resistors each implemented by a contact plug. Each of the contact plugs connects the drain of a first drive transistor and the gate of a second drive transistor with a source line. The source/drain region of each transfer transistor is connected to a bit line implemented by a fourth layer alumninum via a contact plug received in a through-hole having a side wall for insulating the contact plug from the ground line implemented as a third layer polysilicon film.