发明名称 Multiple line grid for use in a packaging or a testing application
摘要 <p>A multiple line grid for redistributing I/O pads from a peripheral array to an area array is disclosed. The multiple line grid includes a body having a top and a bottom surfaces, via holes, connection lines, upper bumps arranged in an area array and lower bumps arranged in tow peripheral/side arrays. Each of the via holes is provided with a first end exposed on the top surface and a second opposite end exposed on the bottom surface of the body. Each of the connection lines has a different length from the neighbouring connection lines. Each of the upper bumps is arranged to be in contact with the first end of the corresponding via hole. Each of the lower bumps is connected to the second end of the corresponding via hole through the corresponding connection line. <IMAGE></p>
申请公布号 EP1154479(A2) 申请公布日期 2001.11.14
申请号 EP20010111638 申请日期 2001.05.14
申请人 GLOTECH INC. 发明人 YOON, CHONG KWANG;KIM, YOUNG SOO
分类号 G01R31/26;G01R1/073;H01L21/66;H01L23/498;(IPC1-7):H01L23/498 主分类号 G01R31/26
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