发明名称 DRAM device with improved memory cell reliability
摘要 Epitaxial silicon layers are formed on n+-source/drain regions of two MOS transistors neighboring to each other and formed on a silicon substrate, respectively. In this processing, polycrystalline silicon pieces are generated on an element isolating and insulating film and others. Thereafter, the silicon substrate is exposed to an oxygen atmosphere so that hydrogen reacts with silicon at the surfaces of the epitaxial silicon layers and the surfaces of the polycrystalline silicon pieces to form silicon oxide films and polycrystalline silicon pieces. Thereby, short-circuit between MOS transistors in neighboring memory cells is prevented, and a semiconductor device has a high electrical reliability.
申请公布号 US6316320(B1) 申请公布日期 2001.11.13
申请号 US19990449572 申请日期 1999.11.29
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 NAKAHATA TAKUMI;YAMAKAWA SATOSHI;ABE YUJI
分类号 H01L27/108;H01L21/285;H01L21/316;H01L21/321;H01L21/768;H01L21/8234;H01L21/8242;H01L27/088;H01L29/76;H01L29/94;(IPC1-7):H01L21/336 主分类号 H01L27/108
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