发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE: A semiconductor IC(Integrated Circuit) is provided to accurately grasp an access time for a large number of memory cell arrays in a test for a short time and to prevent occurrence of delay of access in a representative pin at the normal time. CONSTITUTION: The semiconductor IC includes a coincidence detecting circuit(42) for testing whether plural output signals read out from plural memory cell arrays(Cell 0-Cell 3) are same or not. The semiconductor IC further includes a representative output buffer(36) in which when plural output signals are same, an output signal of the Cell 0 is outputted to a representative pin(DQ0), and when plural output signals are different, an output signal of the Cell 0 is cut off and the representative pin(DQ0) is made to a high impedance state. A normal output buffer(32) is arranged to input/output pins(DQ1-DQ3).
申请公布号 KR20010096513(A) 申请公布日期 2001.11.07
申请号 KR20000072239 申请日期 2000.12.01
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 TANIMURA MASAAKI
分类号 G01R31/28;G06F12/16;G11C29/34;G11C29/40;G11C29/56;(IPC1-7):G11C29/00 主分类号 G01R31/28
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