| 摘要 |
PURPOSE: A semiconductor memory having low power source voltage is provided to improve reliability by applying a low power source voltage. CONSTITUTION: In a word driver(1) of a DRAM, an N channel MOS transistor(QN3) is connected between a gate of a P channel MOS transistor(QP1) for pull-up and a gate of an N channel transistor(QN1) for pull-down, wherein a power source potential(Vcc) is applied to the gate of the N channel MOS transistor(QN3). Even when the voltage of an input signal(ZMWL) turns to a high potential, the voltage of a gate of the N channel MOS transistor(QN1) is kept to the power source potential(Vcc) from which threshold voltage of the N channel MOS transistor(QN3) has been subtracted. Therefore, voltage applied to a gate insulation film of the N channel MOS transistor(QN1) is lower than that of a conventional device, thereby reliability of the N channel MOS transistor(QN1) is improved.
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