发明名称 Memory device having I/O sense amplifier with variable current gain
摘要 A semiconductor memory device having input/output sense amplifiers capable of varying gains using a column address and block selection signals. The input/output sense amplifiers can compensate for reduction of transfer rate according to distance between a selected memory block or sub memory block and the sense amplifiers. A semiconductor memory device of the present invention includes: a plurality of sub memory blocks divided by a column address in a memory block; a plurality of data input/output line pairs coupled to the sub memory blocks, for transmitting data in a selected sub memory block; and a plurality of input/output sense amplifiers for sensing and amplifying data from the data input/output line pairs, wherein each of the input/output sense amplifiers has a variable gain characteristic depending on distance between the selected sub memory block and the input/output sense amplifiers so as to minimize a difference in delay characteristic according to position of the selected sub memory block.
申请公布号 US6314029(B1) 申请公布日期 2001.11.06
申请号 US20000543677 申请日期 2000.04.07
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KO TAE-YOUNG;RHEE SANG-JAE
分类号 G11C11/419;G11C7/06;G11C8/12;G11C11/401;G11C11/409;(IPC1-7):G11C7/08 主分类号 G11C11/419
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