Semiconductor memory device with a plurality of memory blocks

摘要

In accordance with the present invention a semiconductor memory device includes a connection control circuit controlling a connection between a bit line pair and a data input/output line pair. The connection control circuit includes a flip flop. The connection control circuit responds to a sense amplifier activation signal and a column bank address by setting a level of an interlock signal controlling a gate for electrically connecting the bit line pair and the data input/output line pair together.