发明名称 Method of fabricating dual damascene structure
摘要 A method of fabricating a dual damascene is provided. A dielectric layer is formed on a substrate. A diffusion barrier layer is formed on the dielectric layer. A portion of the diffusion barrier layer and the dielectric layer is removed to form a trench and a via hole. A barrier layer is formed on the diffusion barrier layer and in the trench and the via hole. The barrier layer on the diffusion barrier layer is removed by chemical-mechanical polishing. A conductive layer is formed in the trench and the via hole by selective deposition. A planarization step is performed with the diffusion barrier layer serving as a stop layer.
申请公布号 US6313028(B2) 申请公布日期 2001.11.06
申请号 US19990280892 申请日期 1999.03.29
申请人 UNITED MICROELECTRONICS CORP. 发明人 HUANG CHAO-YUAN;WU JUAN-YUAN;LUR WATER
分类号 H01L21/768;(IPC1-7):H01L21/44;H01L21/476 主分类号 H01L21/768
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