| 摘要 |
PROBLEM TO BE SOLVED: To provide a transfer rate converter that converts a transfer rate of data with a decreased circuit scale and realizes an accurate operation by preventing mis-latching. SOLUTION: An FIR filter interpolates input data S101, and an interpolation signal is stored in a RAM 107 at an address denoted by a counter 108 that counts number of input clocks S103 and generates a write address. Furthermore, the stored interpolation signal is read from an address location of a counter 109 that counts number of output locks S104 to generate a read address and generate output data S102. In this case, a counter reset signal S111 resets the counters 108, 109 in common so as to prevent mis-latch of writing to/reading from the RAM thereby conducting an accurate operation.
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