| 摘要 |
PROBLEM TO BE SOLVED: To provide a technique capable of reducing gate delay time of a MIS transistor. SOLUTION: A silicon germanium layer 6b is sandwiched between a metal film 6c and a polycrystalline silicon film 6a which constitute a gate electrode 6, a tunnel barrier between the metal film 6c and the silicon germanium layer 6b is relatively reduced, and contact resistance between the metal film 6c and the polycrystalline silicon film 6a is reduced.
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