| 摘要 |
PROBLEM TO BE SOLVED: To provide an interleave processing circuit, capable of accelerating the start timing of interleave processing in the case of using interleaved data. SOLUTION: A register write control part 1 stores input data DT11 in a register A circuit 2 and a register B circuit 3 in the prescribed writing sequence of a four-bit unit, and data D15 are read from a read data selecting part 4 with a four-bit unit in a reading sequence different from the writing sequence. The data DT15 from the part 4 are converted into prescribed data by a data converting part 6 and subsequently outputted as data DT16, and the data become write data of a dual port memory 9. A write address to the memory 9 is a prescribed address DT18 obtained, in such a manner that an address converting part 8 converts an address DT17 outputted from a memory write control part 7.
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