发明名称 METHOD OF MANUFACTURING MOS TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To provide a method of manufacturing a SOI-MOSFET wherein substrate floating effect is restrained in both an NMOS and a PMOS without deteriorating short channel effect of the PMOS, and a semiconductor device. SOLUTION: Formation of recombination center for eliminating majority carrier generated in an end portion of a drain is performed by ion implantation of an inert element. The quantity of implantation of an inert element for forming recombination center of a PMOS is set in a range wherein substrate floating effect of the PMOS is restrained and deterioration of short channel effect is restrained within an allowable value, independently of the quantity of implantation of an inert element for forming recombination center of an NMOS. As a result, substrate flouting effect is restrained in both the NMOS and the PMOS.
申请公布号 JP2001308332(A) 申请公布日期 2001.11.02
申请号 JP20000118087 申请日期 2000.04.19
申请人 KAWASAKI STEEL CORP 发明人 KIMURA YOSHITAKA
分类号 H01L29/786;(IPC1-7):H01L29/786 主分类号 H01L29/786
代理机构 代理人
主权项
地址