| 摘要 |
A method for manufacturing a capacitor of a semiconductor device is disclosed. The method includes: forming an insulating layer on a semiconductor substrate; forming a pattern layer (typically patterned silicon layer) on the insulating layer; etching the insulating layer using the pattern layer as a mask so as to form a contact hole through the insulating layer; forming a conductive layer on the insulating layer so as to fill the contact hole; removing the conductive layer and the material pattern layer to expose the insulating layer but leave a contact plug in the opening; forming an amorphous silicon pattern layer connecting to the contact plug; and forming a hemispherically grained (HSG) layer on the amorphous silicon pattern layer. The material pattern layer is formed by forming a material layer having etching selectivity different from etching selectivity of the insulating layer and etching the material layer to form an opening through the material layer. The opening exposes the insulating layer and has a sloped side wall. An upper portion of the opening is wider than a lower portion of the opening. By removing the pattern layer, a thick amorphous silicon pattern layer can be used for cell storage nodes and provide a greater area for the HSG layer.
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