| 摘要 |
An address input circuit outputs an address signal from exterior as an internal address signal. A latching circuit accepts the internal address signal, and supplies the accepted signal to an internal circuit in conformity to the operating timing of the internal circuit. A redundancy judgement circuit judges whether or not the internal address signal yet to be accepted into the latching circuit is of a defect address, and outputs the judgement result as a redundancy judgement signal. A redundancy latching circuit accepts the redundancy judgement signal, and supplies the accepted signal to the internal circuit in conformity to the operating timing of the internal circuit. The use of the address signal before it is latched for redundancy judgement allows the redundancy judgement to be performed at earlier timing. Therefore, the amount of time needed for the read operation and write operation can be reduced.
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