| 摘要 |
948,314. Parallel adders. KIENZLE APPARATE G.m.b.H. Sept. 17, 1962 [Sept. 18, 1961], No.35327/62. Heading G4A. A binary-coded decimal adder receiving the bits of a single decimal denomination in parallel on lines 1-4 comprises bi-stable units A-D each of which may be switched by a pulse (representing binary 1) received as the first decimal digit is entered, and also changes state if a pulse is received from the second decimal digit, carries being propagated via delay circuits 12-14. As described, the excess three code is used, so that after each addition 3 must be subtracted if no carry has occurred, and 3 added otherwise. The addition of 13 without allowing carry into carry register 17 is equivalent to subtracting 3, and this is done by a pulse on 22 passing through gate 21; the pulse 22 breaks the circuit to the carry register at 16. If a carry has been registered, gate 20 will be open instead of 21. |
