发明名称 Fixed transconductance bias apparatus
摘要 A transconductance bias circuit includes: a differential pair having a first transistor M14 and a second transistor M15; a resistor R coupled between a gate of the first transistor M14 and a gate of the second transistor M15, the gate of the first transistor M14 is coupled to a reference voltage node; a third transistor M10 coupled to the first transistor M14; a fourth transistor M11 coupled to the second transistor M15; a fifth transistor M8 coupled to the third transistor M10, a gate of the fifth transistor M8 is coupled to the reference voltage node; a sixth transistor M9 coupled to the fourth transistor M11, a gate of the sixth transistor M9 is coupled to the reference voltage node; a current mirror 22 coupled to the fifth and sixth transistors M8 and M9; and a seventh transistor M6 coupled to the fourth transistor M11, a current in the seventh transistor M6 is equal to a current in the resistor R.
申请公布号 US2001035776(A1) 申请公布日期 2001.11.01
申请号 US20010789219 申请日期 2001.02.20
申请人 PAVAN SHANTHI 发明人 PAVAN SHANTHI
分类号 G05F3/26;(IPC1-7):H03D1/00 主分类号 G05F3/26
代理机构 代理人
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