发明名称 ANALOG CLOCK MODULE
摘要 An analog clock apparatus is disclosed including a digital clock source for producing a digital waveform of a predetermined frequency and a direct-digital-synthesizer. The synthesizer has an input to receive the digital waveform and is operative to generate a resultant analog waveform. Prediction logic is coupled to the digital clock source and the synthesizer for determining the relative phase relationships between the digital waveform and the analog waveform. The prediction logic is responsive to a prediction clock having a clock frequency approximating that of said digital clock source.
申请公布号 WO0028340(A8) 申请公布日期 2001.11.01
申请号 WO1999US22901 申请日期 1999.10.01
申请人 TERADYNE, INC. 发明人 GAGE, ROBERT, B.
分类号 G01R31/28;G01R31/30;G01R31/3167;G01R31/319;H03L7/18;(IPC1-7):G01R31/316 主分类号 G01R31/28
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