Pulsdetektor

摘要

To detect if a clock pulse signal is in phase with a reference clock pulse signal in an efficient manner with very high accuracy there is proposed a pulse detector, comprising a first delay unit (12) adapted to receive an input clock pulse signal ( phi (t)) and to delay the input clock pulse signal ( DOLLAR phgr;(t)) by a first pre-specified delay (d1) for output as output clock pulse signal ( phi out(t)) and a second delay unit (14) adapted to delay the output clock pulse signal ( phi out(t)) by a second pre-specified delay (d2). A sampling unit (16) is adapted to sample the input clock pulse signal ( phi (t)) and the output of the second delay unit (14) ( phi out(t-d1-d2)) at a sampling time defined by a reference clock pulse signal ( phi R(t)) and to output the samples (v1, v2) for phase delay indication.