发明名称 Method of forming trench MOS device and termination structure
摘要 A method for fabricating trench MOS devices and termination structure simultaneously is disclosed. The MOS devices can be Schottky diode, IGBT or DMOS depending on the semiconductor substrate prepared. The method comprises following steps: firstly, forming a plurality of first trenches for forming the trench MOS devices in an active region, and a second trench for forming the termination structure. Thereafter, a thermal oxidation process to form a gate oxide on all areas is performed. Then, the first trenches and the second trench are refilled with a first conductive material. An etching back is carried out to remove excess first conductive material so as to form spacer in the second trench and to fill the first trenches only. Next, the gate oxide layer is removed. For IGBT or DMOS device, an extra thermal oxidation and an etching step are required to form inter-conductive oxide layer whereas for Schottky diode, these two steps are skipped. Thereafter, a termination structure oxide layer is formed through deposition, lithographic process and etching. After backside unnecessary layers removal, a sputtering metal layers deposition, lithographic process and etching step are successively performed to form the first electrode with a desired ended location and the second electrode on both side of semiconductor substrate.
申请公布号 US6309929(B1) 申请公布日期 2001.10.30
申请号 US20000668906 申请日期 2000.09.22
申请人 INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE AND GENETAL SEMICONDUCTOR OF TAIWAN, LTD. 发明人 HSU CHIH-WEI;LIU CHUNG-MIN;KAO MING-CHE;TSAI MING-JINN;KUNG PU-JU
分类号 H01L21/331;H01L21/336;H01L29/06;H01L29/40;H01L29/47;H01L29/739;H01L29/78;H01L29/872;(IPC1-7):H01L21/336 主分类号 H01L21/331
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