发明名称 Semiconductor memory device with data retention characteristic of improved stability
摘要 During standby, bit lines BL1 and /BL1 are precharged, and the potentials of word lines WL1 and WL2 are set at a potential slightly higher than a ground potential. Since a stable retaining current flows through an access transistor into a node inside a memory cell holding the H level, the data can be retained with stability. Moreover, during an access, the selected word line is brought to the H level, while the unselected word lines are brought to a ground potential.
申请公布号 US6310795(B1) 申请公布日期 2001.10.30
申请号 US20000584088 申请日期 2000.05.31
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 MORISHIMA CHIKAYOSHI
分类号 G11C11/418;G11C11/405;G11C11/412;G11C11/413;(IPC1-7):G11C5/06 主分类号 G11C11/418
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