发明名称 System for efficient utilization of multiple test systems
摘要 A system for efficient utilization of multiple test systems may include an apparatus for testing an electronic circuit board, which comprises a number of computer readable media containing computer readable program code comprising code for a test analysis system that interfaces with at least two test systems. The test analysis system reads a description of said board's board topology and analyzes a number of potential defects of said board based on that description. The test analysis system creates at least two test procedures for the at least two test systems by creating a first test procedure to test the electronic circuit board on a first test system of the at least two test systems. The system then creates at least one other test procedure to test the electronic circuit board on at least one other test system of the at least two test systems. The system then optimizes the at least one other test procedure based on at least one other of the at least two test procedures created for the at least two test systems to reduce redundancies in the at least two test procedures.
申请公布号 US6311301(B1) 申请公布日期 2001.10.30
申请号 US19990258632 申请日期 1999.02.26
申请人 POSSE KENNETH E.;ORESJO STIG;MONTERIO PATRICIA;DUDFIELD ANNE 发明人 POSSE KENNETH E.;ORESJO STIG;MONTERIO PATRICIA;DUDFIELD ANNE
分类号 G01R31/28;(IPC1-7):G06F11/00 主分类号 G01R31/28
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