| 摘要 |
The present invention provides a new method for performing re-integration of a CPU in a fault tolerant computer system. One of a "remote write" operation and a copy mode is used to copy the contents of the microprogram memory (control memory), all registers and all memories from a current CPU to a faulty CPU. Through the use of special purpose registers this method advantageously simplifies the logic design of the two processors compared to conventional fault tolerant systems with re-integration capabilities. Transfer of re-integration data is efficiently controlled by software in the current CPU so that data which would otherwise be overwritten in the faulty CPU is not transferred. This reduces the required bandwidth and simplifies the mechanical and electrical design of the update bus connected between the two CPU's. This update system provides register to register transfers which results in fast re-integration, which directly translates into decreased down time for the system and thus, increased overall system performance compared to conventional systems.
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