发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE: To provide a semiconductor memory realizing Y system relieving being effective and rational and Y system relieving being simple constitution and efficient. CONSTITUTION: Plural memory mats including plural memory cells coupled respectively to plural bit lines and plural word lines are arranged in the direction of bit line, a sense amplifier column including plural latch circuits of which input/output nodes are connected to half of pairs of bit lines which are allotted to the memory mat and provided is provided in a region between memory mats arranged in the direction of bit line, and effective and rational Y system relieving is realized by enabling to replace the pairs of bit lines and sense amplifiers connected to them by pairs of redundant bit lines and corresponding to redundant sense amplifiers.
申请公布号 KR20010093664(A) 申请公布日期 2001.10.29
申请号 KR20010014128 申请日期 2001.03.19
申请人 HITACHI. LTD. 发明人 HASEGAWA MASATOSHI;KAJIGAYA KAZUHIKO
分类号 G11C11/401;G11C7/00;G11C29/00;G11C29/02;G11C29/04;(IPC1-7):G11C29/00 主分类号 G11C11/401
代理机构 代理人
主权项
地址