CIRCUIT DE MEMOIRE CACHE, PROCEDE POUR INSERER DES DONNEES DANS UNE MEMOIRE CACHE ET DISPOSITIF DE TRAITEMENT UTILISANT UNE TELLE MEMOIRE

摘要

The circuit has a cache memory (50) accessed in response to an address signal, an output buffer holding the output of the cache and a circuit determining whether data associated with an address is in the buffer and a controller (52) to extract the data from the buffer and fetch data from the cache if the data is not in the buffer.