| 摘要 |
PURPOSE: A system for measuring the receive sensitivity of received data is provided to improve a data transmission rate and a receive sensitivity by using a digital/analog converter including a signal interpolation filter. CONSTITUTION: A digital signal processor(11) receives digitalized sample data and performs a signal processing function by performing an operation process for digital value. A digital/analog converter(12) converts a digital signal to an analog signal and performs an over-sampling process for the analog signal. A latch(13) is connected with input ports(I0-I13) of the digital/analog converter(12) and a parallel bus(DBUS) of the digital signal processor(11) to perform a data interface function. An FPGA(Flexible Programmable Gate Array)(14) generates a clock signal of 80KHz as a certain period of approach and outputs the clock signal to an external interrupt terminal(INT1) of the digital signal processor(11) and a clock line(CLK) of the digital/analog converter(12). A recovery filter(15) extracts an image from the analog signal of the digital/analog converter(12) and perform a signal regeneration function by performing an image removal function.
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