| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory which can perform data transfer surely and at high speed. SOLUTION: This semiconductor memory is provided with a pair of complementary data bus DB, DB#, capacitive elements C01, C02 corresponding to even-numbered addresses, an equalizing circuit TE, an amplifier 10, capacitive elements C11, C12 corresponding to odd-numbered addresses, an equalizing circuit TO, and an amplifier 11. The pair of complementary data bus transmits continuously and alternately even-numbered address data Even and odd-numbered address data Odd read out from a memory cell array. At the time of operation of the amplifier 10, the equalizing circuit TO is operated, and at the time of operation of the amplifier 11, the equalizing circuit TE is operated.
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