| 摘要 |
To accomplish low power consumption of a semiconductor memory device, an internal voltage generating apparatus of the present invention applies an internal power voltage having the lower potential level as an operation voltage of a chip. By differentiating the internal power voltage for each of a peripheral circuit and a core circuit within a DRAM to use them as an operational voltage of the cell, i.e., by supplying the lowered internal power voltage to the core circuit unit, the reliability of the cell and noise characteristic is improved.
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